Research Papers

Step Ring-Based Three-Dimensional Path Planning Via Graphics Processing Unit Simulation for Subtractive Three-Dimensional Printing

[+] Author and Article Information
Zhengkai Wu

School of Electrical and Computer Engineering,
Georgia Institute of Technology,
Atlanta, GA 30332

Thomas M. Tucker

Tucker Innovations,
Charlotte, NC 28173

Chandra Nath

George W. Woodruff School
of Mechanical Engineering,
Georgia Institute of Technology,
Atlanta, GA 30332-0405

Thomas R. Kurfess

George W. Woodruff School
of Mechanical Engineering,
Georgia Institute of Technology,
Atlanta, GA 30332-0405
e-mail: kurfess@gatech.edu

Richard W. Vuduc

School of Computational Science
and Engineering,
Georgia Institute of Technology,
Atlanta, GA 30332-0765

1Present address: R&D Division, Hitachi America Ltd., Farmington Hills, MI 48335.

2Corresponding author.

Contributed by the Manufacturing Engineering Division of ASME for publication in the JOURNAL OF MANUFACTURING SCIENCE AND ENGINEERING. Manuscript received August 4, 2016; final manuscript received August 28, 2016; published online October 6, 2016. Editor: Y. Lawrence Yao.

J. Manuf. Sci. Eng 139(3), 031010 (Oct 06, 2016) (10 pages) Paper No: MANU-16-1415; doi: 10.1115/1.4034662 History: Received August 04, 2016; Revised August 28, 2016

In this paper, both software model visualization with path simulation and associated machining product are produced based on the step ring-based three-axis path planning to demo model-driven graphics processing unit (GPU) feature in tool path planning and 3D image model classification by GPU simulation. Subtractive 3D printing (i.e., 3D machining) is represented as integration between 3D printing modeling and computer numerical control (CNC) machining via GPU simulated software. Path planning is applied through visualization of surface material removal in high-resolution and 3D path simulation via ring selective path planning based on accessibility of path through pattern selection. First, the step ring selects critical features to reconstruct computer-aided design (CAD) design model as stereolithography (STL) voxel, and then, local optimization is attained within interested ring area for time and energy saving of GPU volume generation as compared to global automatic path planning with longer latency. The reconstructed CAD model comes from an original sample (GATech buzz) with 2D image information. CAD model for optimization and validation is adopted to sustain manufacturing reproduction based on system simulation feedback. To avoid collision with the produced path from retraction path, we pick adaptive ring path generation and prediction in each planning iteration, which may also minimize material removal. Moreover, we did partition analysis and G-code optimization for large-scale model and high density volume data. Image classification and grid analysis based on adaptive 3D tree depth are proposed for multilevel set partition of the model to define no cutting zones. After that, accessibility map is computed based on accessibility space for rotational angular space of path orientation to compare step ring-based pass planning verses global path planning of all geometries. Feature analysis via central processing unit (CPU) or GPU processor for GPU map computation contributes to high-performance computing and cloud computing potential through parallel computing application of subtractive 3D printing in the future.

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Fig. 1

Data structure and branch topology of HDT

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Fig. 4

Parameter tuning system with simulation

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Fig. 5

Model validation of subtractive 3D printing

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Fig. 7

Roughing path G-code simulation of buzz

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Fig. 8

First division G-code simulation of buzz

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Fig. 9

Second division G-code simulation of buzz

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Fig. 10

Adaptive tree depth-based 3D grid model topology classification

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Fig. 11

Grid modeling for model recognition

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Fig. 6

Ring distribution and simulation iteration

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Fig. 3

Local versus global path planning for ring

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Fig. 2

Model-driven system analytic flow

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Fig. 12

Pass simulation and surface visualization

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Fig. 13

End volume generation of local versus global path

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Fig. 14

GPU map sequence time by processor

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Fig. 15

Points per pump in map sequence

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Fig. 16

GPU map sequence time by ring number

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Fig. 17

Map sequence time of ring versus all path (local versus global) by depth-based path planning




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