Parallelism Improvement of Ground Silicon Wafers

[+] Author and Article Information
S. Matsui, T. Horiuchi

J. Eng. Ind 113(1), 25-28 (Feb 01, 1991) (4 pages) doi:10.1115/1.2899618 History: Received March 01, 1988; Online April 08, 2008


This paper discusses substituting grinding for lapping in machining processes of silicon wafers. To attain this goal, the rotating wafer grinding method, in which a rotating wafer is ground by continuous infeed of a cup wheel, is investigated. The parallelism of a silicon wafer ground by this method is within 2 μm for a 5 in. (125 mm) wafer.

Copyright © 1991 by The American Society of Mechanical Engineers
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